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COMe-P2020 User Guide

Table 3-20: 0x010: Serdes Multiplexer Control Register

ACTION D7 D6 D5 D4 D3 D2 D1 D0

READ NU NU NU NU NU Sel2 Sel1 Sel1

WRITENUNUNUNUNUSel2Sel1Sel1

POWER UP1111111 1

BITFIELD DESCRIPTION

[D2-D0] Sel0 Serdes#1 Multiplexer selection :

'0' = CPU Serdes Lane#1 is connected to Carrier Serdes Lane#1

'1' = CPU Serdes Lane#1 is connected to Carrier Serdes Lane#4

Sel1 Serdes#2 Multiplexer selection :

'0' = CPU Serdes Lane#2 is connected to Carrier Serdes Lane#2

'1' = CPU Serdes Lane#2 is connected to Carrier Serdes Lane#10

Sel2 Serdes#3 Multiplexer selection :

'0' = CPU Serdes Lane#3 is connected to Carrier Serdes Lane#3

'1' = CPU Serdes Lane#3 is connected to Carrier Serdes Lane#11

Table 3-21: 0x011: User Checksum Register

ACTION D7 D6 D5 D4 D3 D2 D1 D0

READ Compare_Byte[7:0]

WRITE Compare_Byte[7:0]

POWER UP1111111 1

BITFIELD DESCRIPTION

[D7-D0] Compare_Byte[7:0] Checksum Control Byte:

User Configuration is only valid if sum of all 16 CPU Configuration Registers

(0x000 - 0x010) + value of User Checksum Register =0x011) is equal 00h.

If the addition of all 17 registers is not equal 00h CPLD forces automatically Default

Configuration strappings to CPU.

Table 3-22: 0x012: UFM Erase Control Register

ACTION D7 D6 D5 D4 D3 D2 D1 D0

WRITENUNUNUNUNUNUNURstUfm

POWER UP0000000 0

BITFIELD DESCRIPTION

[D0] RstUfm Reset UFM Memory (set all memory cells to 0xFF):

'0' = no Reset

'1' = Reset UFM (bit is set by register access and automatically reset by CPLD)

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Kontron COMe-cP2020 Bedienungsanleitung Seite 51