Kontron COMe-bHL6 Bedienungsanleitung Seite 70

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 129
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 69
COMe-bHL6 / Pinout List
B63 GPO3 General Purpose Output 3 O-3.3 PD 10k -
B64 PCIE_RX1+ PCI Express Lane 1 Receive + DP-I - -
B65 PCIE_RX1- PCI Express Lane 1 Receive - DP-I - -
B66 WAKE0# PCI Express Wake Event I-3.3 PU 10k 3.3V (S5) -
B67 WAKE1# General Purpose Wake Event I-3.3 PU 10k 3.3V (S5) -
B68 PCIE_RX0+ PCI Express Lane 0 Receive + DP-I - -
B69 PCIE_RX0- PCI Express Lane 0 Receive - DP-I - -
B70 GND Power Ground PWR GND - -
B71 LVDS_B0+ LVDS Channel B Data0 + DP-O - -
B72 LVDS_B0- LVDS Channel B Data0 - DP-O - -
B73 LVDS_B1+ LVDS Channel B Data1 + DP-O - -
B74 LVDS_B1- LVDS Channel B Data1 - DP-O - -
B75 LVDS_B2+ LVDS Channel B Data2 + DP-O - -
B76 LVDS_B2- LVDS Channel B Data2 - DP-O - -
B77 LVDS_B3+ LVDS Channel B Data3 + DP-O - -
B78 LVDS_B3- LVDS Channel B Data3 - DP-O - -
B79 LVDS_BKLT_EN Panel Backlight On O-3.3 PD 100k configuration as eDP_BKLT_EN in customised article
version possible
B80 GND Power Ground PWR GND - -
B81 LVDS_B_CK+ LVDS Channel B Clock + DP-O - -
B82 LVDS_B_CK- LVDS Channel B Clock - DP-O - -
B83 LVDS_BKLT_CTRL Backlight Brightness Control O-3.3 - -
B84 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B85 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B86 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B87 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B88 BIOS_DIS1# BIOS Selection Strap 1 I-3.3 PU 10k 3.3V (SPI) PU might be powered during suspend
B89 VGA_RED Red Analog Video Output OA PD 150R -
B90 GND Power Ground PWR GND - -
B91 VGA_GRN Green Analog Video Output OA PD 150R -
B92 VGA_BLU Blue Analog Video Output OA PD 150R -
B93 VGA_HSYnc VGA Horizontal Synchronisation O-3.3 - -
B94 VGA_VSYnc VGA Vertical Synchronization O-3.3 - -
B95 VGA_I2C_CK VGA Data Channel Clock I/O-3.3 PU 1k1 3.3V (S0) -
B96 VGA_I2C_DAT VGA Data Channel Data I/O-3.3 PU 1k1 3.3V (S0) -
B97 SPI_CS# SPI Chip Select O-3.3 - -
B98 RSVD Reserved for future use nc - -
B99 RSVD Reserved for future use nc - -
B100 GND Power Ground PWR GND - -
B101 FAN_PWMOUT Fan PWM Output O-3.3 - 20V protection circuit implemented on module, PD on
carrier board needed for proper operation
B102 FAN_TACHIN Fan Tach Input I-3.3 PU 47k 3.3V (S0) 20V protection circuit implemented on module
B103 SLEEP# Sleep Button Input I-3.3 PU 47k 3.3V (S5) 20V protection circuit implemented on module
B104 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B105 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B106 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B107 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B108 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B109 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B110 GND Power Ground PWR GND - -
70
Seitenansicht 69
1 2 ... 65 66 67 68 69 70 71 72 73 74 75 ... 128 129

Kommentare zu diesen Handbüchern

Keine Kommentare