Kontron COMe Starterkit Eval T2 Bedienungsanleitung Seite 46
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COM Express Interfaces
Figure 17: PCI Express: ExpressCard Example
Figure 17 above shows an ExpressCard implementation. The example shows COM Express
PCIe lane 2 and USB port 1 used, but other assignments may be made depending on Module
capabilities and the system configuration.
Nets PCIE_TX2+ and PCIE_TX2- are sourced from the COM Express Module. These lines drive
the PCIe receivers on the Express Card. No coupling capacitors are required on the Carrier
Board. These lines are capacitively coupled on the COM Express Module.
Nets PCIE_RX2+ and PCIE_RX2- are driven by the Express Card. No coupling capacitors are
required on the Carrier Board. These lines are capacitively coupled on the Express Card.
Nets PCIE_REF_CLK1+ and PCIE_REF_CLK1- are sourced from the PCIe Reference Clock
Buffer (described earlier in Section 2.3.5.1. 'Reference Clock Buffer' on page 34 above).
CPPE# is pulled low on the Express Card to indicate that a card is present and has a PCIe
interface. CPUSB# is pulled low on the Express Card to indicate the presences of an Express
Card and a USB 2.0 interface. Either CPPE# or CPUSB# low causes the TPS2231
ExpressCard power control IC to provide power to the Express Card.
PICMG
®
COM Express
®
Carrier Board Design Guide Rev. 2.0 / December 6, 2013
46/218
VCC_3V3_SBY
VCC_3V3_SBY
VCC_3V3
VCC_1V5
VCC_3V3_SBY
VCC_3V3
VCC_1V5
VCC_3V3_SBY_EXPCARD
VCC_3V3_EXPCARD
VCC_1V5_EXPCARD
CEX
USB1-
CEX
USB1+
CEX
SMB_DAT_S0
CEX
WAKE0#
PCIE_RX2+
CEX
PCIE_RX2-
PCIE_TX2+
CEX
PCIE_TX2-
PCIE_CLKREQ1#
PCIE_CLK_REF1-
PCIE_CLK_REF1+
CEX
SMB_CK_S0
CEX
SUS_S3#
CEX
SUS_S3#
CEX
USB_0_1_OC#
CEX
EXCD0_RST#
CEX
EXCD0_CPPE#
EXCD_PWRGOOD
Bypass caps for TPS2231
TPS2231
U3
TPS2231
NC
9
SYSRST#
1
SHDN#
2
STBY#
3
3.3IN
4
3.3IN
5
3.3OUT
6
3.3OUT
7
PERST#
8
GND
10
CPUSB#
11
CPPE#
12
1.5OUT
13
1.5OUT
14
1.5IN
15
1.5IN
16
AUXOUT
17
AUXIN
18
19
RCLKEN
OC#
20
+
C15
47 uF
1
2
R18
Do Not Stuff
C20
47 uF
J4
ExpressCard Socket
GND
1
USB_D-
2
USB_D+
3
CPUSB#
4
RSVD0
5
RSVD1
6
1.5V
9
SMB_CLK
7
SMB_DAT
8
1.5V
10
WAKE#
11
3.3VAUX
12
PERST#
13
3.3VS
14
3.3VS
15
CLKREQ#
16
CPPE#
17
REFCLK-
18
REFCLK+
19
GND
20
PERn0
21
PERp0
22
GND
23
PETn0
24
PETp0
25
GND
26
SHLD1
27
SHLD2
28
SHLD3
29
SHLD4
30
X1
X1
X2
X2
X3
X3
D1
C13
100n
C17
100n
C14
47 uF
100n
C22
R19
Do Not Stuff
R21
330R
+
C23
47 uF
1
2
C16
100n
100n
C21
C12
100n
+
C19
47 uF
1
2
R20
Do Not Stuff
C18
47 uF
VCC_3V3_SBY_EXPCARD
VCC_3V3_EXPCARD
VCC_1V5_EXPCARD
+
+
+
1
2
1
2
1
2
- COM Express® 1
- Carrier Design Guide 1
- Contents 3
- 1. Preface 8
- 1.6. Name and logo usage 9
- 1.7. Intellectual property 10
- Term Description 11
- 1.10. Schematic Conventions 15
- 2. COM Express Interfaces 16
- COM Expre ss Module 17
- Type 10 17
- Table 4: Pin-out Comparison 20
- , the PCI 30
- 2.3.5. Schematic Examples 34
- Signal Pin Description I/O 45
- Figure 15: ExpressCard Size 45
- 2.4.1. Signal Definitions 48
- 2.4.2. PEG Configuration 49
- 2.4.3. Reference Schematics 52
- DisplayPort is supported 55
- DisplayPort Example 56
- Figure 21: HDMI Example 57
- Figure 22: DVI Example 59
- SDVO Port Configuration 61
- Supported SDVO Devices 62
- DVI_SDAROM 63
- DVI_SCLROM 63
- SDVO I2C Bus Address 63
- Write = 0111 0000 (70h) 63
- Read = 0111 0001 (71h) 63
- 2.6.1. Signal Definitions 66
- Earliest asserted 1ms after 68
- 3.3V, 5V and 12V are stable 68
- 2.7. LAN 70
- 2.7.2. Reference Schematics 73
- 2.8. USB Ports 76
- 2.8.2. Reference Schematics 77
- 2.9. USB 3.0 81
- 2.9.1.3. USB 3.0 connector 83
- 2.9.2. Reference Schematics 84
- 2.10. SATA 87
- Pins Signal Description 88
- SATA Port 89
- 2.11. LVDS 91
- Term Definition 94
- 2.11.2. Reference Schematics 97
- 2.12.1. Signal Definitions 99
- 2.12.2. Reference Schematics 100
- 2.13. VGA 101
- COM Express Interfaces 102
- 2.14. TV-Out 104
- COM Express Module 106
- AUDIO POWER 107
- AUDIO CODEC - ALC888 107
- ANALOG I/O CONNECTOR 107
- 2.15.1.2. AC'97 108
- Figure 41: Audio Amplifier 109
- 2.16.1. Signal Definition 111
- SUPER I/O 115
- COM1/COM2 116
- 2.17.1. Signal Definition 118
- 2.18.1. Signal Definitions 121
- 2.18.2. Reference Schematics 121
- 2.19.1. Signal Definitions 123
- 2.20.1. Signal Definitions 125
- C O M 1 C O M 2 126
- 2.21. CAN Interface 127
- 2.21.2. Reference Schematics 128
- 2.22. Miscellaneous Signals 129
- POWER ATX 133
- POWER AT 133
- Type 2 Detection 133
- 2.22.5. Watchdog Timer 137
- G P IO C o n n e c t o r 141
- 2.22.8. Fan Connector 142
- 2.22.9. Thermal Interface 143
- 2.23. PCI Bus 147
- 2.23.2. Reference Schematics 148
- 2.24.1. Signal Definitions 153
- 3. Power and Reset 156
- 3.2.1. ATX vs AT Supplies 157
- 3.2.2. Power States 157
- Power and Reset 158
- 3.2.5. Power Button 162
- 3.4. Reference Schematics 164
- Table 55: ATX Signal Names 166
- ATX Signal Name Description 166
- 3.5. Routing Considerations 167
- 3.5.3. VCC5_SBY Routing 168
- 4. BIOS Considerations 170
- Type Height Partnumber Note 171
- COM Express Module Connectors 172
- GND Plane 173
- Power Plane 173
- COM Express 175
- Table 60: Trace Parameters 176
- Symbol Definition 176
- Carrier Board 178
- Parameter Trace Routing 183
- Extended 194
- 7.2. Heatspreader 195
- (Ø2.7mm bore hole) 196
- (M2.5 thread) 196
- (Ø2.7 bore hole) 197
- Mechanical Considerations 198
- 8.3. Useful books 202
- 9.1. TV-Out 203
- 9.1.5. Signal Termination 206
- 9.1.6. Video Filter 206
- 9.1.7. ESD Protection 206
- 9.2. LPC Firmware Hub 207
- Appendix C: List of Tables 213
- Appendix D: List of Figures 215
- Table 79: Revision History 217
- Revision Date Author Changes 217
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